Reducing Round-off Error in an ADSL Modem with Block-Floating-Point Structure
نویسندگان
چکیده
In this paper, we report an issue first observed when using block-floating-point calculations in a time equalizer of an ADSL modem. We believe this important phenomenon have been out of the sight of researchers till now; and show that neglecting this issue may increase the round-off error significantly and reduce the SNR of a system. The simulation results suggest that ignoring this issue may increase RMS of errors by a factor of 2 in an equalizer. Then, we present two different methods for correcting this error. We use a FIR filter with 16 taps whose coefficients are set with Chow algorithm for equalizing an ADSL channel, using block-floating-point structure. We observed that for 3.3% of the inputs, the error of rounding is greater than error of truncation. By curing this issue, truncation error remains always above rounding error, as expected. As well, the RMS of the overall error is reduced by 17%.
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